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APW3007
Advanced Dual PWM and Dual Linear Power Controller
Features
*
Provides 4 Regulated Voltages
General Description
The APW3007 provides the power control and protection for four output voltage in high-performance microprocessor and computer applications. The APW3007 is designed to provide termination voltage VTT(1.25V) with 1% accuracy. It integrates two PWM controllers , a linear regulator and a liear controller as well as the monitoring and protection function into a single package. One PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck converter , while the second PWM controller supplies the I/O 3.3V power with a standard buck converter. The linear controller regulates power for GTL bus and the intermal 200mA regulator for clock driver circuits. The APW3007 can provide in excess of 14A of output current for an on-board DC/DC converter via internal reference voltage. It can monitor all the output voltage , and a single Power Good signal is issued when the core is within 10% of the internal reference voltage and the other levels are above their undervoltage levels. Additional built-in over-voltage protection for the core output uses the lower MOSFET to prevent output voltage above 115% of the reference voltage. The PWM controller's over-current function monitor the output current by sensing the voltage drop across the upper MOSFET's RDS(ON) , eliminating the need for a current sensing resistor.
- Microprocessor Core , I/O , Clock Chip and
GTL Bus
* *
Simple Single-Loop Control Design
- Voltage-Mode PWM Control
Fast Transient Response
- High-Bandwidth Error Amplifier - Full 0% to 100% Duty Ratio *
Excellent Output Voltage Regulation
- Core PWM Output : 1% Over Temperature - I/O PWM Output : 2% Over Temperature - Other Output : 2.5% Over Temperature * *
Power-Good Output Voltage Monitor Microprocessor Core Voltage Protection Against Shorted MOSFET
* Over-Voltage and Over-Current Fault Monitors * Small Converter Size - Constant Frequency Operation - 200kHz Free-Running Oscillator ;
Programmagle from 50kHz to 800kHz
Applications
* * * *
Motherboard Power Regulation for Computers Low-Voltage Distributed Power Supplies VGA Card Power Regulation Termination Voltage
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.5 - Jun., 2003 1 www.anpec.com.tw
APW3007
Pin Description
UGATE2 PHASE2 NC NC NC NC NC PGOO D OCSET2 FB2 V5 SS FAULT NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V12 UGATE1 PHASE1 LG ATE1 PGND OCSET1 VSEN1 FB1 NC FB3 GATE3 GND NC VSEN2 UGATE2 PHASE2 NC NC NC NC NC PGOO D OCSET2 FB2 V5 SS FAULT FB4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V12 UGATE1 PHASE1 LG ATE1 PGND OCSET1 VSEN1 FB1 NC FB3 GATE3 GND Vout4 VSEN2
APW3007-12
APW3007-13
Ordering and Marking Information
A PW 3007
H a n d lin g C o d e Tem p. R ange Package Code V o lta g e C o d e V o lta g e C o d e 1 2 : 1 .2 5 V Package Code K : SO P - 28 Tem p. R ange C : 0 to 7 0 C H a n d lin g C o d e TU : T ube 1 3 : 1 .3 0 V
T R : Tape & R eel
AP W 3007 K :
AP W 3007 XXXXX
X X X X X - D a te C o d e
Absolute Maximum Ratings
Symbol V12 VI , VO TA TJ TSTG TS Parameter Supply Voltage Input , Output or I/O Voltage Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Rating 15 GND -0.3 V to V12 +0.3 0 to 70 0 to 125 -65 to +150 300 ,10 seconds Unit V V C C C C
Copyright ANPEC Electronics Corp. Rev. A.5 - Jun., 2003
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APW3007
Block Diagram
VSEN1 FB4 OCSET1 V12 V5
VOUT4
0.3V
FB3 GATE3
1.26V 0.3V
LU V
110%
PO W ER-O N RE SET
PGOOD
90%
OCSET2
200uA VC C THER M AL PR OTE CTION DRIVE 2 O C2 VC C G ATE CO NTRO L INHIB IT FAULT SO FT-START AN D FAULT LO G IC 0V O C1 INHIB IT G ATE CO NTRO L ER RO R AM P1 PW M 1 VC C DR IV E1 115%
200uA
UGATE2 PHASE2
UGATE1 PHASE1
PW M 2
FB2
2.0V ER RO R AM P2
VSEN2
LGATE1
LO W ER DR IV E 3.3K VREF
OS CILLATO R
PGND
2.5V
4.3V 4.6V
GND
FAULT
SS FB1
Thermal Characteristics
Symbol R JA Parameter Thermal Resistance in Free Air SOIC SOIC (with 3in2 of Copper) Value 75 65 Unit C/W
Copyright ANPEC Electronics Corp. Rev. A.5 - Jun., 2003
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APW3007
Electrical Characteristics
(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
APW3007 Min Typ 9.5 0.5 Supply ramping up 4.3 0.3 V12 V5 RT= Open RT= Open 185 6 2 200 1.9 215 Max
Symbol Supply UVLO Section
Parameter
Test Conditions
Unit
UVLO Threshold-12V UVLO Hysterises-12V UVLO Threshold-5V UVLO Hysterises-5V Supply Current I12 I5 Oscillator FOCS VOSC Free Running Frequency Ramp Amplitude Nominal Supply Current
Supply ramping up
V V V V
mA
kHz VP-P
Switching Controller Reference Voltage VREF Reference Voltage APW3007-12 APW3007-13 Reference Voltage accuracy VFB2 Output Voltage VFB2 Voltage Accuracy 2.5V Regulator (Vout4) Vo4 Reference Voltage Dropout Voltage Load Regulation Line Regulation Input bias Current Output Current Current Limit Thermal Shutdown 1.5V Regulator (Vout3) Vo3 Reference Voltage Reference Voltage Accaracy Input bias current Output Drive Current TA=25 , GATE=FB3 TA=25 , Vout4=FB4 Io=200mA 1mA1.25 1.30 -1.0 2 -2 1.26 0.6 0.5 0.2 2 200 300 420 150 1.26 -2.5 50 +2.5 2 +2 +1.0
V % V % V V % % A mA mA C V % A mA
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APW3007
Electrical Characteristics Cont.
Symbol Parameter Test Conditions APW3007 Min Typ 88 15 COMP1 = 10pF V12 = 12V , VUGATE = 6V VUGATE-PHASE =1V V12 = 12V , VLGATE = 1V VLGATE = 1V VSEN1 ramping up VSEN1 ramping down VFAULT/RT=2.0V VOCSET=4.5VDC OCSET=0V , Phase=5V VSEN1 Rising VSEN1 Rising Upper /Lower Threshold RL = 3mA RL = 5k Pull up to 5V 170 117 115 8.5 200 23 110 94 2 0.4 4.8 230 1 3 6 1 3.5 Max Unit
Synchronous PWM Controller Error Amplifier DC Gain GBWP Gain-Bandwidth Product SR IUGATE ILGATE Slew Rate UGATE Source LGATE Source PWM Controller Gate Drive A A % % mA A K % % % V V RUGATE UGATE Sink RLGATE LGATE Sink Protection VSEN1 O.V. Upper trip point VSEN1 O.V. lower trip point IOVP IOCSET RSS FAULT Souring Current OCSET Current Source Pull up resistor to 5V VSEN1 Upper Threshold VSEN1 Under Voltage VSEN1 Hysteresis VPGOOD-L PGOOD Voltage Low VPGOOD-H PGOOD Voltage High dB MHz V/S
Power Good
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APW3007
Functional Pin Description
UGATE2 (Pin1) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the regulator's pass transistor . PHASE1 , PHASE2 (Pin26 and 2) SS (Pin12) Connect the PHASE pins to the respective PWM converter's upper MOSFET source. These pins are used to monitor the voltage drop across the upper MOSFETs for over-current protection . NC (Pin 3,4,5,6,7,20) No connection. PGOOD (Pin8) FAULT (Pin13) PGOOD is an open collector output used to indicate the status of the output voltages. This pin is pulled low when the synchronous regulator output is not within 10% of the DACOUT reference voltage or when any of the other outputs are below their under-voltage thresholds . OCSET1 , OCSET2 (Pin23 and Pin9) Connect a resistor (ROCSET) from this pin to the drain of the respective upper MOSFET. ROCSET , an internal 200A current source (I OCSET) , and the upper MOSFET's on-resistance (rDS(ON)) set the converter over-current (OC) trip point according to the following equation : This pin has dual function. It acts as an output of the OVP cicuitry or it can be used to program the frequency using an extermal resistor. When used as a fault detector , if any of the switcher outputs exceed the OVP trip point , the FAULT pin switches to 12V and the soft start cap is discharged. If the FAULT pin is to be connected to any external circuity , it needs to be buffered as shown in the application circuit . FB4 (Pin14) APW3007-12 : NC This pin provides the feedback for the internal LDO regular that its ourpur is Vout4. VSEN2 (Pin15) This pin is connected to the output of the I/O switching regulator. It is an input that provides sensing for the Under/Over voltage circuitry for the I/O supply as well as the power for the internal LDO regulator . VOUT4 (Pin16) APW3007-12 : NC This pin is the output of the internal LDO regulator. This pin provides the soft start for the 2 switching regulators. An internal resistor charges an external capacitor that is connected from 5V supply to this pin which ramps up the outputs of the switching regulators , preventing the outputs from overshooting as well as limiting the input current. The second function of the Soft Start cap is to provides long off time for the synchronoud MOSFET during current limiting . V5 (Pin11) 5V supply voltage. A high frequency capacitor (0.1 to 1uF) must be placed close to this pin and connected from this pin to the GND plane for noise free operation.
IPEAK=
I OCSET x R OCSET r DS(ON)
FB2 (Pin10) This pin provides the feedback for the non-synchronous switching regulator. A resistor driver is connected from this pin to vout2 and GND that sets the output voltage. The value of the resistor connected from Vout2 to FB2 must be less than 100 .
Copyright ANPEC Electronics Corp. Rev. A.5 - Jun., 2003
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APW3007
Functional Pin Description (Cont.)
GND (Pin 17) Signal ground for the IC. All voltage levels are measured with respect to this pin. GATE3 (Pin 18) Connect this pin to the gate of an external MOSFET. This pin provides the drive for the 1.5V regulator's pass transistor. FB3 (Pin 19) Connect this pin to the output of the 1.5V linear regulator. This pin is monitored for under-voltage events. FB1 (Pin21) This pin provides the feedback for the synchronous switching regulator . Typically this pin can be connected directly to the output of the switching regulator . However , a resistor driver is recommended to be connected from this pin to vout1 and GND to adjust the output voltage for any drop in the output voltage that is caused by the trace resistance . The value of the resistor connected from Vou1 to FB1 must be less than 100 . VSEN1 (Pin 22). This pin is connected to the PWM converter's output voltage . The PGOOD and OVP comparator circuits use this signal to report output voltage status and for over-voltage protection . PGND (Pin 24) This is the power ground connection . Tie the synchronous PWM converter's lower MOSFET source to this pin . LGATE (Pin 25) Connect LGATE to the PWM converter's lower MOSFET gate . This pin provides the gate drive for the lower MOSFET . UGATE (Pin 27) Connect UGATE pin to the PWM converter's upper MOSFET gate . This pin provides the gate drive for the upper MOSFET . V12 (Pin28) Provide a 12V bias supply for the IC to this pin . This pin also provides the gate bias charge for all the MOSFETs controlled by the IC . The voltage at this pin is monitored for Power-On Reset purposes .
Simplified Power System Diagram
5V C IN C IN 3.3V
L1 N VVD D C OUT
PW M 2 C ontroller PW M 1 C ontroller
L2 VT T
C OUT Linear C ontroller 3.3V FB VD DQ C IN C OUT V OUT 4 Linear R egulator
Copyright ANPEC Electronics Corp. Rev. A.5 - Jun., 2003
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APW3007
Typical Application Circuit
APW3007-12
RX1 10R 12V L800 2uH 5V C807 330uF C808 1000uF Q802 APM9410 L801 7.8uH NVVDD 2.05V/4A C810 330uF R814 100RF C811 330uF D800 FM5820 R813 5.1R
1 2 3 4 5 6 7 8 9 10 11 28 27 26 25 24 23 22 21 20 19 18 17 16 15
C812 220pF
C809 220pF
C801 1uF
R817 1.2K R819 5.1R C813 330uF Q803A APM7313 L803 7.8uH Q803B APM7313
L802 2uH AGP 3.3V C814 10uF
R812 1.5k
UGATE2 PHASE2 NC NC NC NC NC PGOOD OCSET2 FB2 V5 SS FAULT NC
V12 UGATE1 PHASE1 LGATE1 PGND OCSET1 VSEN1 FB1 NC FB3 GATE3 GND NC VSEN2
R820 5.1R
VTT 1.25V/3.5A C816 330uF C815 330uF
R821 100R
AGP 3.3V Q800 APM3055 R810 97.6RF C802 330uF
5V R816 4.02KF C805 1uF
12 13 14
APW3007-12 C800 10uF C804 1uF R811 100RF C817 330uF
FBVDDQ 2.5V/1.5A
APW3007-13
RX1 10R 12V L800 2uH 5V C807 330uF C808 1000uF Q 802 A PM 9410 L801 7.8uH NV V DD 2.05V /4 A C810 330uF R814 100RF C811 330uF D800 FM 5820 R813 5.1R R820 5.1R R812 1.5k C809 220pF R817 1.2K L802 2uH AGP 3.3V C813 330uF Q 803A A PM 7313 V TT 1.25V /3 .5A C816 330uF C815 330uF C814 10uF C812 220pF
C801 1uF
R819 5.1R
1 2 3 4 5 6 7 8 9 10 11
U G ATE2 PHASE2 NC NC NC NC NC PG O O D O C SET 2 F B2 V5 SS F AU LT F B4
V12 U G ATE1 PHASE1 LG AT E1 PG ND O C SET1 VSEN1 F B1 NC F B3 G AT E3 G ND Vout4 VSEN2
28 27 26 25 24 23 22 21 20 19 18 17 16 15
L803 7.8uH Q 803B A PM 7313
R821 100R
AGP 3.3V Q 800 A PM 3055 R810 97.6RF C802 330uF
5V R816 4.02K F C805 1uF
12 13 14
A PW 3007-13 R811 100R F C817 330uF
FB V DDQ 2.5V /1.5A
C800 10uF
C804 1uF
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APW3007
Package Information
SO - 300mil ( Reference JEDEC Registration MS-013)
D N
E
GAU PLA
123 A e B A1 L
Millimeters Dim A A1 B D E e H L N 1 Min. 2.35 0.10 0.33 Max. 2.65 0.30 0.51
Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 10.10 11.35 12.60 15.20 17.70 8.80 Max. 10.50 11.76 13 15.60 18.11 9.20 Dim A A1 B D E e H L N 1
Inches Min. 0.093 0.004 0.013 Max. 0.1043 0.0120 0.020
Variations- D Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 0.398 0.447 0.496 0.599 0.697 0.347 Max. 0.413 0.463 0.512 0.614 0.713 0.362
See variations 7.40 7.60
See variations 0.2914 0.2992
1.27BSC 10 0.40 10.65 1.27
0.050BSC 0.394 0.016 0.419 0.050
See variations 0 8
See variations 0 8
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APW3007
Physical Specifications
Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb) Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 1000 devices per reel
Refolw Condition (IR/ Convection or VPR Reflow)
Reference JEDEC Standard J-STD-020A APRIL 1999
temperature Peak temperature
183C Pre-heat temperature
Time
Classification Reflow Profiles
Convection or IR/ Convection VPR 3C/second max. 10 C /second max. 120 seconds max. 60 ~ 150 seconds 10 ~ 20 seconds 220 +5/-0C or 235 +5/-0C 6 C /second max. 6 minutes max. 60 seconds 215~ 219C or 235 +5/-0C 10 C /second max.
Average ramp-up rate(183C to Peak) Preheat temperature 125 25C) Temperature maintained above 183C Time within 5C of actual peak temperature Peak temperature range Ramp-down rate Time 25C to peak temperature
Package Reflow Conditions
pkg. thickness 2.5mm and all bags Convection 220 +5/-0 C VPR 215-219 C IR/Convection 220 +5/-0 C pkg. thickness < 2.5mm and pkg. volume 350 mm pkg. thickness < 2.5mm and pkg. volume < 350mm Convection 235 +5/-0 C VPR 235 +5/-0 C IR/Convection 235 +5/-0 C
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APW3007
Reliability test program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C , 5 SEC 1000 Hrs Bias @ 125 C 168 Hrs, 100 % RH , 121C -65C ~ 150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA
Tape & Reel Dimensions
t Po P P1 D
E
F W
Bo
Ao
Ko D1 T2
J C A B
T1
Application
A 3301
B 62 1.5 D 1.5 +0.1
SOP- 28
F 11.5 0.1
C 12.75 0. 5 D1
J 2 0.6 Po
T1 24.4 0.2 P1
T2 2 0.2 Ao
W 24 0.3 Bo
P 12 0.1 Ko
E 1.75 0.1 t
1.5+ 0.25 4.0 0.1
2.0 0.1 10.85 0.1 18.34 0.1 2.97 0.1 0.350.01
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APW3007
Cover Tape Dimensions
Application SOP- 28 Carrier Width 24 Cover Tape Width 21.3 Devices Per Reel 1000
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
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